求才內容說明

職務編號：

 HW250259

職務類別：

 硬體工程/研發技術

職務說明：

 1.PCB stack-up design & Constraint Rule setting.
2.Provide SI/PI design suggestions for PCB layout.
3.Signal integrity analysis of high-speed and low-speed signal interfaces.
4.Power integrity design includes DC impedance, AC resonance and capacitance optimization.
5.In addition to Cadence 2.5D EM solution as a daily necessary software, AMD SeaSim/S2Eye, Intel ICAT/IMLC/CCT are also required.
6.Use TCL and Python to shorten the complicated software operation process, generate reports and perform DOE analysis.
7.Familiar with PCB test coupon TDR/TDT measurement and Delta L 4.0 Measurement.

工作地點：

 基隆/台北

薪　　資：

 面議

專長條件：

 1.MS-Electrical Engineering or equivalent experience.
2.Strong understanding of electromagnetics including transmission line theory and PCB stack-up Design.
3.Hands on use of 2.5/3-D modeling tools like Cadence PowerSI, CST, ANSYS HFSS/Q3D/SIwave.
4.Hands on use of PCB layout tool Allegro and understand constraint management settings.
5.Familiarity with SI/PI analysis flow including frequency domain and time domain simulation.
6.Familiarity with high-speed I/O design concepts including clock generation, transmitter & receiver design, and equalization schemes.
7.Experience w/ Python, Matlab, VBS, or C for simulation automation.
8.5-8年NB廠/DT廠/ WS/AIO相關SI設計經驗
9.英文中等

企業背景

產業類別：

 電子/電腦/週邊

公司背景：

 電腦及其週邊設備製造業

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